Taiwan Team Develops PAM-4 Transceiver, Achieves Breakthrough in Chip Transmission
A Taiwanese research team has developed a PAM-4 transceiver and CPO module that achieves 100Gb/s single-channel transmission, aiming to replace traditional pluggable modules in data centers to enhance speed and reduce power consumption.
📋 Article Processing Timeline
- 📰 Published: May 13, 2026 at 14:12
- 🔍 Collected: May 13, 2026 at 14:32 (19 min after Published)
- 🤖 AI Analyzed: May 13, 2026 at 14:54 (22 min after Collected)
Central News Agency
(Central News Agency reporter Zhao Minya, Taipei, May 13) With rapid technological advancements, chip design technology faces unprecedented challenges. A Taiwanese research team has successfully developed a "four-level pulse amplitude modulation (PAM-4) transceiver." Combining co-packaged optics (CPO) modules, the single-channel transmission rate can reach 100Gb/s, which is expected to replace traditional pluggable modules in data centers, enhancing transmission speed and reducing system power consumption.
The National Science and Technology Council (NSTC) held a press conference today on research achievements. Under the support of the key emerging chip design and R&D program, a research team composed of Associate Professors Peng Peng-jui and Hsieh Ping-hsuan from the Department of Electrical Engineering, National Tsing Hua University, Associate Professor Liu Yi-chun from the Institute of Electronics Engineering, and Associate Research Fellow Lin Ming-wei from the Taiwan Semiconductor Research Institute (TSRI) of the National Applied Research Laboratories, jointly developed the PAM-4 transceiver, demonstrating a breakthrough in chip transmission.
Peng Peng-jui explained that PAM-4 technology increases the transmitted signal from traditional two amplitude levels to four different amplitude outputs, enhancing the amount of information carried by the signal and effectively boosting data transmission rates. However, to accurately demodulate four different amplitude signals, the receiver circuit architecture is relatively complex. The team proposed an innovative PAM-4 receiver design that utilizes low-resolution analog-to-digital converters to achieve high-speed data sampling and demodulation.
He pointed out that the team's developed PAM-4 transceiver architecture, manufactured using a 28-nanometer process, can achieve the characteristics of transceiver chips realized by major international high-speed chip manufacturers using a 7-nanometer process. This offers a cost advantage in future commercial applications.
Peng Peng-jui stated that in addition to the PAM-4 transceiver design, the team also used a 100Gb/s electrical transceiver chip as the core. By combining high-speed optoelectronic conversion components on a silicon photonics interposer, they successfully developed a CPO module through heterogeneous integration packaging technology, addressing the need for high-speed silicon photonics interposer development for CPO modules.
He explained that silicon photonics technology uses silicon wafers to create optical components, enabling optical signals to be transmitted and processed on the chip. Compared to traditional pluggable optical modules, CPO modules can achieve highly integrated designs, shorten system transmission distances, effectively increase bandwidth, and reduce power consumption.
Peng Peng-jui emphasized that compared to traditional electrical signals, optical signals offer higher bandwidth and lower power consumption, making them particularly suitable for high-speed data transmission and artificial intelligence (AI) data center applications. The team has developed a silicon-based micro-ring modulator (MRM) achieving 100Gbps electro-optical conversion and integrated high-speed photodetectors with bandwidths greater than 50GHz.
Peng Peng-jui noted that the key technologies developed by the team for this project have obtained six US invention patents and eight Republic of China invention patents. In addition to multiple industry-academia cooperation projects, these technologies are also expected to be introduced into the industry through technology transfer for industrial application in the future. (Edited by Lin Shu-yuan) 1150513
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(Central News Agency reporter Zhao Minya, Taipei, May 13) With rapid technological advancements, chip design technology faces unprecedented challenges. A Taiwanese research team has successfully developed a "four-level pulse amplitude modulation (PAM-4) transceiver." Combining co-packaged optics (CPO) modules, the single-channel transmission rate can reach 100Gb/s, which is expected to replace traditional pluggable modules in data centers, enhancing transmission speed and reducing system power consumption.
The National Science and Technology Council (NSTC) held a press conference today on research achievements. Under the support of the key emerging chip design and R&D program, a research team composed of Associate Professors Peng Peng-jui and Hsieh Ping-hsuan from the Department of Electrical Engineering, National Tsing Hua University, Associate Professor Liu Yi-chun from the Institute of Electronics Engineering, and Associate Research Fellow Lin Ming-wei from the Taiwan Semiconductor Research Institute (TSRI) of the National Applied Research Laboratories, jointly developed the PAM-4 transceiver, demonstrating a breakthrough in chip transmission.
Peng Peng-jui explained that PAM-4 technology increases the transmitted signal from traditional two amplitude levels to four different amplitude outputs, enhancing the amount of information carried by the signal and effectively boosting data transmission rates. However, to accurately demodulate four different amplitude signals, the receiver circuit architecture is relatively complex. The team proposed an innovative PAM-4 receiver design that utilizes low-resolution analog-to-digital converters to achieve high-speed data sampling and demodulation.
He pointed out that the team's developed PAM-4 transceiver architecture, manufactured using a 28-nanometer process, can achieve the characteristics of transceiver chips realized by major international high-speed chip manufacturers using a 7-nanometer process. This offers a cost advantage in future commercial applications.
Peng Peng-jui stated that in addition to the PAM-4 transceiver design, the team also used a 100Gb/s electrical transceiver chip as the core. By combining high-speed optoelectronic conversion components on a silicon photonics interposer, they successfully developed a CPO module through heterogeneous integration packaging technology, addressing the need for high-speed silicon photonics interposer development for CPO modules.
He explained that silicon photonics technology uses silicon wafers to create optical components, enabling optical signals to be transmitted and processed on the chip. Compared to traditional pluggable optical modules, CPO modules can achieve highly integrated designs, shorten system transmission distances, effectively increase bandwidth, and reduce power consumption.
Peng Peng-jui emphasized that compared to traditional electrical signals, optical signals offer higher bandwidth and lower power consumption, making them particularly suitable for high-speed data transmission and artificial intelligence (AI) data center applications. The team has developed a silicon-based micro-ring modulator (MRM) achieving 100Gbps electro-optical conversion and integrated high-speed photodetectors with bandwidths greater than 50GHz.
Peng Peng-jui noted that the key technologies developed by the team for this project have obtained six US invention patents and eight Republic of China invention patents. In addition to multiple industry-academia cooperation projects, these technologies are also expected to be introduced into the industry through technology transfer for industrial application in the future. (Edited by Lin Shu-yuan) 1150513
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The text, images, audio, and video on this website may not be reproduced, publicly broadcast, publicly transmitted, or utilized without authorization.