AndTech to Host Web Seminar on Advanced Logic Semiconductor Trends and PLP/Advanced Packaging Technology on June 19
AndTech Co., Ltd. will hold a web seminar on June 19, 2026, focusing on development trends in advanced logic semiconductors, PLP (Panel Level Packaging), and advanced packaging technologies. Experts from NB Research, TOWA, Mitsubishi Materials, and the University of Tokyo will discuss challenges and prospects in sealing technologies and assembly for the 2nm generation.
📋 Article Processing Timeline
- 📰 Published: May 26, 2026 at 02:58
- 🔍 Collected: May 25, 2026 at 18:31
- 🤖 AI Analyzed: May 27, 2026 at 00:26 (29h 54m after Collected)
AndTech Co., Ltd. (Headquarters: Kawasaki City, Kanagawa Prefecture; President: Masao Suyama) will offer a specialized "Semiconductor PLP" course featuring leading instructors as part of its Zoom lecture series for R&D support. The seminar addresses the growing interest in Panel Level Packaging (PLP) for semiconductor applications.
The course will cover development trends in advanced logic semiconductors and provide detailed explanations of sealing/molding technologies, rectangular silicon, FOPLP, and assembly techniques for the 2nm generation.
The seminar is scheduled for June 19, 2026.
### Live Stream / Web Seminar Overview
- **Theme:** Development Trends of Advanced Logic Semiconductors and Challenges/Prospects of PLP and Advanced Packaging Technology — Sealing/Molding, Rectangular Silicon, FOPLP, and Assembly for the 2nm Generation.
- **Date & Time:** June 19, 2026 (Fri), 11:00-16:45 JST
- **Fee:** 60,500 JPY (including tax) *Digital materials to be distributed.
- **Format:** Zoom (Live Streaming)
### Program & Lecturers
- **Part 1:** Latest Trends in Semiconductor Packaging and Future Encapsulants — Encapsulants for FO-WLP/PLP and Liquid Sheet Encapsulants
- Lecturer: Kazuhiro Nomura, NB Research
- **Part 2:** Evolution of Molding Technology Supporting Semiconductor Assembly — The Frontline of Advanced Packaging in the AI Era
- Lecturer: Yuichi Kajigawa, Group Leader, Market Strategy Dept., TOWA Corporation
- **Part 3:** Development of Rectangular Silicon Substrates for Semiconductor Packaging and Application to PLP
- Lecturer: Takuma Katase, Technology Strategy Office, Mitsubishi Materials Corporation
- **Part 4:** A New Turning Point for Semiconductor Technology — 2nm Generation Semiconductor Device and Process Technology
- Lecturer: Prof. Masaharu Kobayashi, Institute of Industrial Science, The University of Tokyo
### Knowledge and Technical Challenges Addressed
- Latest technical trends in semiconductor packaging.
- Fundamentals of semiconductor encapsulant design (for WLP/PLP).
- Roles and positioning of molding technologies (Transfer vs. Compression molding).
- Technical trends toward Panel Level Packaging (PLP) and molding challenges (warpage control, narrow-gap MUF filling).
- Materials, processes, and device technologies for transistors and interconnects in advanced logic semiconductors.
### About AndTech Co., Ltd.
AndTech is an R&D support service provider offering information to clients in various fields such as chemicals, materials, electronics, automotive, energy, and medical devices. It provides diverse services including technical seminars, consulting, and market research.
The course will cover development trends in advanced logic semiconductors and provide detailed explanations of sealing/molding technologies, rectangular silicon, FOPLP, and assembly techniques for the 2nm generation.
The seminar is scheduled for June 19, 2026.
### Live Stream / Web Seminar Overview
- **Theme:** Development Trends of Advanced Logic Semiconductors and Challenges/Prospects of PLP and Advanced Packaging Technology — Sealing/Molding, Rectangular Silicon, FOPLP, and Assembly for the 2nm Generation.
- **Date & Time:** June 19, 2026 (Fri), 11:00-16:45 JST
- **Fee:** 60,500 JPY (including tax) *Digital materials to be distributed.
- **Format:** Zoom (Live Streaming)
### Program & Lecturers
- **Part 1:** Latest Trends in Semiconductor Packaging and Future Encapsulants — Encapsulants for FO-WLP/PLP and Liquid Sheet Encapsulants
- Lecturer: Kazuhiro Nomura, NB Research
- **Part 2:** Evolution of Molding Technology Supporting Semiconductor Assembly — The Frontline of Advanced Packaging in the AI Era
- Lecturer: Yuichi Kajigawa, Group Leader, Market Strategy Dept., TOWA Corporation
- **Part 3:** Development of Rectangular Silicon Substrates for Semiconductor Packaging and Application to PLP
- Lecturer: Takuma Katase, Technology Strategy Office, Mitsubishi Materials Corporation
- **Part 4:** A New Turning Point for Semiconductor Technology — 2nm Generation Semiconductor Device and Process Technology
- Lecturer: Prof. Masaharu Kobayashi, Institute of Industrial Science, The University of Tokyo
### Knowledge and Technical Challenges Addressed
- Latest technical trends in semiconductor packaging.
- Fundamentals of semiconductor encapsulant design (for WLP/PLP).
- Roles and positioning of molding technologies (Transfer vs. Compression molding).
- Technical trends toward Panel Level Packaging (PLP) and molding challenges (warpage control, narrow-gap MUF filling).
- Materials, processes, and device technologies for transistors and interconnects in advanced logic semiconductors.
### About AndTech Co., Ltd.
AndTech is an R&D support service provider offering information to clients in various fields such as chemicals, materials, electronics, automotive, energy, and medical devices. It provides diverse services including technical seminars, consulting, and market research.
FAQ
このセミナーの主なテーマは何ですか？
先端ロジック半導体の開発動向、PLP（パネルレベルパッケージ）化、および封止・モールド技術や2nm世代に向けた実装技術が主なテーマです。
講師はどのような方々ですか？
NBリサーチの野村和宏氏、TOWAの家治川祐一氏、三菱マテリアルの片瀬琢磨氏、東京大学の小林正治教授の4名が登壇し、それぞれの専門分野を解説します。
開催日時と受講料を教えてください。
2026年6月19日（金）の11:00から16:45まで開催され、受講料は一人あたり税込60,500円です。
セミナーの受講形式はどうなっていますか？
WEB会議ツール「Zoom」を使用したライブ配信形式で行われます。お申し込み後にURLが送付されます。
このセミナーで解決できる技術課題は何ですか？
半導体パッケージの最新トレンドの把握、封止材の設計、多段積層時の反り抑制、狭ギャップ充填技術、2nm世代のプロセス技術などの課題解決に役立ちます。