AMD: 'Venice' EPYC Processor in Mass Production with TSMC's 2nm Process, to Expand to US Fab in Future

(CNA, Hsinchu, May 21, by reporter Chang Chien-chung) U.S. chip maker Advanced Micro Devices (AMD) announced today that its EPYC processor, codenamed 'Venice,' has entered mass production in Taiwan using TSMC's 2-nanometer process technology, with plans to expand mass production to TSMC's fab in Arizona, USA, in the future. In a press release today, AMD Chair and CEO Lisa Su stated that advancing the mass production of Venice on TSMC's 2nm process technology is a significant step in accelerating the development of next-generation AI infrastructure. As AI and agent-based workloads expand rapidly, customers need platforms that can move from innovation to mass production more quickly. The deep collaboration with TSMC helps AMD bring leading computing technology to market at the speed and scale that current demand requires. AMD pointed out that the mass production of Venice in Taiwan, along with future capacity expansion plans at TSMC's Arizona fab, reflects AMD's continuous strengthening of its geographically diverse advanced manufacturing layout. By combining the technological innovations of the next-generation EPYC processor with global advanced capacity, AMD continues to expand its solid foundation to help customers deploy and scale their AI infrastructure. TSMC Chairman and President C.C. Wei said that the close collaboration with AMD reflects the importance of combining leading process technology with advanced design innovation in driving the development of next-generation high-performance and AI computing. AMD stated it plans to extend TSMC's 2nm process technology to 'Verano' in its data center central processing unit (CPU) roadmap, which is the 6th generation EPYC processor, to create industry-leading performance-per-dollar-per-watt. AMD noted that Verano is designed to support cloud and AI computing workloads and is expected to introduce advanced memory innovations, including LPDDR, on top of the EPYC platform. This will provide the necessary CPU performance, bandwidth, and power efficiency for increasingly power-constrained workloads and applications. AMD said its collaboration with TSMC covers key technologies required to expand modern data center computing, from TSMC's 2nm process technology for next-gen CPUs to advanced packaging technologies, including TSMC's SoIC-X and CoWoS-L.