Powerchip: 1P process in cooperation with Micron to mass produce in second half of 2028

Powerchip General Manager Frank Huang announced that the 1P process, developed in cooperation with Micron, is entering the development phase and is expected to achieve mass production in the second half of 2028. Powerchip aims to transform into a specialized wafer foundry focused on AI applications from 2026 onwards, offering advanced manufacturing services such as high-frequency memory.
提携NQ 0/100出典:PR Times

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  • 📰 Published: April 21, 2026 at 18:31
  • 🔍 Collected: April 21, 2026 at 19:02 (30 min after Published)
  • 🤖 AI Analyzed: April 21, 2026 at 21:00 (1h 58m after Collected)
Taipei, April 21 (CNA) Frank Huang, General Manager of wafer foundry Powerchip Semiconductor Manufacturing Corp. (PSMC), said today that the 1P process in cooperation with Micron has entered the development stage, with new equipment expected to be introduced in the first quarter of 2027, trial production completed in the first half of 2028, and mass production in the second half of 2028. In addition, the HBM PWF production line in cooperation with Micron is expected to mass produce in the fourth quarter of 2027.

Powerchip held an online investor conference this afternoon to announce its first-quarter operating results. Powerchip's first-quarter revenue was NT$13.572 billion, with a gross profit margin of 10.23% and a net profit after tax of NT$14.231 billion, resulting in earnings per share of NT$3.36.

Huang explained the progress of cooperation with Micron, stating that the 1P process in cooperation with Micron has entered the development stage. New equipment is expected to be moved in during the first quarter of 2027, trial production completed in the first half of 2028, and mass production in the second half of 2028. The number of chips per wafer for 1P is 2.5 times that of the existing mainstream process platform, which will significantly contribute to the increase in DRAM output value in the future.

Huang pointed out that the High Bandwidth Memory (HBM) backend wafer manufacturing (PWF) production line, in cooperation with Micron, has expanded its cleanroom in the Hsinchu plant area. Equipment is expected to begin moving in during the third quarter of 2026, trial production to begin in the fourth quarter of 2026, and mass production to begin in the fourth quarter of 2027, with a target monthly production capacity of 20,000 wafers.

Huang said that Powerchip will transform into a specialized wafer foundry with AI applications as its core from 2026, based on native memory technology, combined with logic control chips, and providing foundry services for important components applied in 2.5D advanced packaging, such as power management ICs, power components, silicon interposers, and silicon capacitors.

In terms of memory foundry business, Huang said that the supply gap in the memory market may extend until the second half of 2026. Powerchip significantly raised DRAM foundry prices in March, and the price increase effect is expected to become apparent from June.

Huang pointed out that Powerchip significantly raised the wafer foundry price for NAND Flash in April. In addition to Single-Level Cell (SLC), it is also cooperating with customers to develop Multi-Level Cell (MLC), with process development expected to be completed by the end of the year, and available for customer design finalization in the first half of 2027. NOR Flash is expected to ramp up in the fourth quarter of 2025.

In terms of logic foundry business, Huang said that the foundry prices for 12-inch panel driver ICs and image sensors were raised by double digits starting in January. Power management chips for AI servers are beginning to ramp up, with monthly wafer starts exceeding 10,000. (Editor: Yang Kai-hsiang) 1150421

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