Cadence Announces Industry-First Fully Autonomous Virtual Engineer for Chip Design Powered by NVIDIA

Key facts

  • Cadence Announces Industry-First Fully Autonomous Virtual Engineer for Chip Design Powered by NVIDIA
  • At Computex 2026, Cadence announced the industry's first fully autonomous virtual AI design engineer, the ChipStack AI Super Agent, powered by NVIDIA technology. It achieves Level-5 autonomy, accelerating verification cycles by over 40x, reducing a typical 5-week verification loop to under one day.
  • Source: PR Times
  • Date: June 3, 2026

Direct answer

At Computex 2026, Cadence announced the industry's first fully autonomous virtual AI design engineer, the ChipStack AI Super Agent, powered by NVIDIA technology. It achieves Level-5 autonomy, accelerating verification cycles by over 40x, reducing a typical 5-week verification loop to under one day.

Citation
Cadence Announces Industry-First Fully Autonomous Virtual Engineer for Chip Design Powered by NVIDIA (June 3, 2026), PR Times
Source
PR Times
Date
June 3, 2026
At Computex 2026, Cadence announced the industry's first fully autonomous virtual AI design engineer, the ChipStack AI Super Agent, powered by NVIDIA technology. It achieves Level-5 autonomy, accelerating verification cycles by over 40x, reducing a typical 5-week verification loop to under one day.
新製品NQ 0/100出典:PR Times

📋 Article Processing Timeline

  • 📰 Published: June 3, 2026 at 11:00
  • 🔍 Collected: June 3, 2026 at 11:27 (27 min after Published)
  • 🤖 AI Analyzed: June 6, 2026 at 23:45 (84h 18m after Collected)
Cadence (Headquarters: San Jose, California, USA, Nasdaq: CDNS) announced on June 1 (US time) at Computex 2026 the expansion of the ChipStack™ AI Super Agent's autonomy to Level-5, unveiling the industry's first fully autonomous virtual AI design engineer.

This solution is built on Cadence's AI-driven EDA (Electronic Design Automation) portfolio, leveraging NVIDIA Nemotron models, and is securely executed on the NVIDIA OpenShell runtime. This enables customers to efficiently run dynamic simulations within an automated workflow.

At NVIDIA, thousands of engineers utilize hundreds of billions of compute hours annually, running millions of tests for design verification. In this environment, each engineer uses the ChipStack agent to automatically execute hundreds of verifications combining dynamic simulation with Cadence® Xcelium™ and formal verification with Jasper®.

As a result, RTL verification cycles are accelerated by over 40x compared to conventional methods, reducing a typical 5-week verification loop to under one day, significantly speeding up the verification of increasingly complex semiconductor designs.

■ Cadence Comment

Paul Cunningham (Senior Vice President and General Manager, System Verification Group)

"Our customers are leveraging AI to enable their skilled engineers to tackle more advanced and complex silicon designs with greater speed and confidence than ever before.

With the ChipStack AI Super Agent, Cadence is taking the next step: evolving from AI that assists engineers to an autonomous virtual engineer capable of executing actual design and verification tasks. This solution is built on our signoff-accurate verification engines and operates in a secure, governed environment, helping development teams drive innovation faster and with more confidence."

From AI Assistance to Autonomous Engineering

The ChipStack AI Super Agent operates with Level-5 autonomy, autonomously executing complex chip design and verification workflows. Meanwhile, engineers can monitor progress, participate in decision-making, and collaborate as needed.

In addition to native integration with collaboration environments, it offers compatibility with development assistance tools like Codex and Claude Code, ensuring transparency of autonomous processes and providing an environment where the entire team can track the system's progress and decisions.

Rather than relying on sequential prompt instructions, this agent autonomously evaluates intermediate results, determines the next action, and iterates the process to converge on a final result. It spans tasks such as specification understanding, RTL generation, verification planning, formal analysis, simulation, debugging, and design closure, optimizing the entire design and verification process.

This shifts the engineer's role from executing individual tasks to supervising outcomes and directing design intent. The autonomous verification workflow reduces verification cycles that traditionally took weeks to under one day in advanced deployment environments.

Reliability Based on Engineering Certainty and Production-Ready Security

A key differentiator for Cadence is that the autonomous agent's behavior is tightly integrated with its core physics-based design and verification engines. This ensures that AI-driven decisions and actions are based on proven computational models and signoff-accurate results, providing the reliability required for advanced, mission-critical engineering.

Furthermore, for production deployment, the ChipStack AI Super Agent runs on the NVIDIA OpenShell runtime. OpenShell is a sandboxed environment for autonomous agents that supports governance and protects sensitive IP through policy control, isolation, and managed access to tools, infrastructure, and design data.

The combination of Cadence's physics-based engines and OpenShell's security architecture enables a practical transition from supervised pilot phases to production-level autonomous design flows.

■ NVIDIA Comment

Timothy Costa (Vice President and General Manager, Computational Engineering)

"As semiconductor design grows more complex, engineering teams need AI agents that can accelerate verification without compromising security, control, or reliability.

By running Cadence's ChipStack AI Super Agent securely on NVIDIA OpenShell and enhancing it with Nemotron models, Cadence brings governed autonomy to chip design workflows. This allows customers to develop and verify advanced semiconductors more quickly and safely."

Leading the Next Generation of Agentic AI

This announcement demonstrates Cadence's accelerating innovation in the agentic AI space, enhanced by NVIDIA's technology.

Since acquiring ChipStack in November 2025, Cadence announced its first product in February 2026 and expanded its portfolio to AI Super Agents at 'CadenceLIVE' in April 2026. Specifically, it announced the ViraStack AI Super Agent for custom and analog design, the InnoStack AI Super Agent for digital implementation and signoff, and the Cadence AgentStack orchestration framework for integrating and controlling agentic workflows across the entire design stack. (*1)

Cadence is now further evolving these capabilities, expanding them to full autonomy.

(*1) Reference: Agentic AI 'Cadence AI Super Agents' Redefining Chip Design from Specification to Signoff

https://community.cadence.com/cadence_blogs_8/b/cadence-japan/posts/ai-cadence-ai-super-agents

Availability

Level-5 autonomous capabilities for the ChipStack AI Super Agent and AgentStack orchestration framework are scheduled to be available for early access customers in the second half of 2026.

FAQ

What are the main functions of the ChipStack AI Super Agent?

It autonomously executes specification understanding, RTL generation, verification planning, formal analysis, simulation, debugging, and design closure.

When will this product be available?

Level-5 autonomous capabilities are scheduled for early access customers in the second half of 2026.

What is the significance of the collaboration with NVIDIA?

NVIDIA Nemotron models enhance AI capabilities, and OpenShell provides a secure execution environment.